Comments on “Interstage Gain-Proration Technique for Digital-Domain Multistep ADC Calibration”
نویسندگان
چکیده
In the commented paper,1 a gain-proration technique is introduced to correct the interstage gain error that occurs when multiple stages of a multistep analog-to-digital converter are calibrated. In this brief, however, it is shown that correction of this interstage gain error is unnecessary for multistage analog-to-digital converter self-calibration.
منابع مشابه
Corrections to “A Comment on ‘Interstage Gain Proration Technique for Digital-Domain Multi-Step ADC Calibration’”
Manuscript received September 20, 1999. The authors are with the Laboratory of Electronics and Information Systems, University of Ghent, B-9000 Gent, Belgium. 1 , IEEE Trans. Circuits Syst. II, vol. 46, pp. 1114–1116, Aug. 1999. Publisher Item Identifier S 1057-7130(99)10272-6. calibration was introduced by Lee and Song in [1]. This important paper was incorrectly omitted from the references. I...
متن کاملRadix-based Digital Calibration Technique for Multi-stage Adc
This paper describes a digital-domain self-calibration technique for multi-stage analog-to-digital converter (ADC). An accurate calibration is achieved by using a modified radixbased calculation. The equivalent radix-based error term for each stage is extracted by measuring major carry jumps from the ADC transfer curve. A new multiplying digitalto-analog converter (MDAC) architecture using (ins...
متن کامل18.6 A 12b 75MS/s Pipelined ADC using Open-Loop Residue Amplification
Conventional pipelined ADCs use electronic feedback to achieve highly linear and drift insensitive transfer characteristics in their interstage gain elements. Especially in the converter frontend, amplifiers with large open-loop gain are needed to achieve the desired accuracy. Due to additional, conflicting low noise and high bandwidth requirements, precision amplifiers dominate the power dissi...
متن کاملA 12-bit 50M samples/s digitally self-calibrated pipelined ADC
This thesis describes the different aspects of the design and implementation of a I2-bit 50M samplesjs pipelined non-binary radix 1.9 analog-to-digital converter. The converter architecture is made up of 14 stages with an interstage gain of 1.9 (non-binary radix). Each stage is made of one fully differential sample-and-hold amplifier (SHA), a I-bit sub-ADC (basically one comparator) and a I-bit...
متن کاملA Digital Calibration Algorithm with Variable-amplitude Dithering for Domain-extended Pipeline Adcs
The pseudorandom noise dither (PN dither) technique is used to measure domain-extended pipeline analog-to-digital converter (ADC) gain errors and to calibrate them digitally, while the digital error correction technique is used to correct the comparator offsets through the use of redundancy bits. However, both these techniques suffer from three disadvantages: slow convergence speed, deduction o...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1999